View TAS5615DKDR_9087141.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 160 w stereo/300w mono purepath ? hd analog-input power stage check for samples: tas5615 1 features description 23 ? active enabled integrated feedback provides: (purepath ? hd technology) the tas5615 is a high-performance analog input class-d amplifier with integrated closed-loop ? signal bandwidth up to 80 khz for feedback technology (known as purepath ? hd high-frequency content from technology). it has the ability to drive up to 160 high-definition sources w (1) stereo into 8- ? speakers from a single 50-v ? ultralow 0.03% thd at 1 w into 8 ? supply. ? 0.03% thd across all frequencies for purepath hd technology enables traditional natural sound at 1 w ab-amplifier performance ( < 0.03% thd) levels while ? 80-db psrr (btl, no input signal) providing the power efficiency of traditional class-d amplifiers. ? > 100-db (a weighted) snr ? click- and pop-free start-up ultralow 0.03% thd+n is flat across all frequencies, ensuring that the amplifier does not add uneven ? minimal external components compared to distortion characteristics, and helps maintain a natural discrete solutions sound. ? multiple configurations possible on the same the efficiency of this class-d amplifier is greater than pcb: 90%. undervoltage protection, overtemperature, ? mono parallel bridge-tied load (pbtl) clipping, short-circuit and overcurrent protection are ? 2.1 single-ended (se) stereo pair and all integrated, safeguarding the device and speakers bridge-tied load (btl) subwoofer against fault conditions that could damage the system. ? quad single-ended (se) outputs ? total output power at 10% thd+n ? 300 w in mono pbtl configuration ? 160 w per channel in stereo btl ? 80 w per channel in quad single-ended ? high efficiency power stage ( > 90%) with 120 m ? output mosfets ? two thermally enhanced package options: ? phd (64-pin qfp) ? dkd (44-pin psop3) ? self-protection design (including undervoltage, overtemperature, clipping, and short-circuit protection) with error reporting ? emi compliant when used with recommended system design applications ? mini combo system (1) achievable output power levels are dependent on the thermal configuration of the target application. a high performance ? av receivers thermal interface material between the package exposed ? dvd receivers heatslug and the heat sink should be used to achieve high ? active speakers output power levels 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 purepath hd is a trademark of texas instruments. 3 all other trademarks are the property of their respective owners. production data information is current as of publication date. copyright ? 2009 ? 2010, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. purepath digital purepath tm hd class-g power supply ref. design 110 vac 240 vac ? 25 vC50 v analog audio input 12 v purepath tm hd tas5615 (2.1 configuration) ! ? ! ? ! ? 3 opa1632 15 v
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. device information terminal assignment the tas5615 is available in two thermally enhanced package s: purepath hd ? ? 64-pin qfp (phd) power package ? 44-pin psop3 package (dkd) the package type contains a heat slug that is located on the top side of the device for convenient thermal coupling to the heat sink. 2 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615 pin one location phd package 26 16 15 oc_adj 14 reset 13 c_startup 12 input_a 11 input_b 10 vi_cm 9 gnd 8 agnd 7 vreg 6 input_c 5 input_d 4 freq_adj 3 osc_io+ 2 osc_io- 1 sd 64-pins qfp package pin 1 marker white dot 32 gnd_d 31 pvdd_d 30 pvdd_d 29 out_d 28 out_d 27 bst_d gvdd_d 25 gvdd_c 24 gnd 23 gnd 22 nc 21 nc 20 nc 19 nc 18 psu_ref 17 vdd 33 gnd_d 34 gnd_c 35 gnd_c 36 out_c 37 out_c 38 pvdd_c 39 pvdd_c 40 bst_c 41 bst_b 42 pvdd_b 43 out_b 44 gnd_b 45 gnd_a 46 47 48 55 49 50 51 ready 52 m1 53 m2 54 m3 gnd 56 gnd 57 gvdd_b 58 gvdd_a 59 bst_a 60 out_a 61 out_a 62 pvdd_a 63 pvdd_a 64 gnd_a otw1 clip pvdd_b out_b gnd_b dkd package (top view) 44 pins package (top view) 12 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 4443 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 m3 oc_adj vdd psu_ref m2 m1 ready otw sd osc_io- osc_io+ freq_adj input_d input_c vreg agnd gnd vi_cm input_b input_a c_startup reset gnd_c out_a bst_a out_b bst_b pvdd_b pvdd_a bst_c pvdd_c out_c gnd_a gnd_b out_d pvdd_d bst_d gnd_d gvdd_ab gvdd_cd pvdd_a pvdd_d out_d out_a otw2 phd package (top view) electrical pin 1
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 mode selection pins mode pins output analog description input configuration m3 m2 m1 0 0 0 differential 2 btl ad mode 0 0 1 ? ? reserved 0 1 0 differential 2 btl bd mode differential 0 1 1 1 btl +2 se ad mode, btl differential single-ended 1 0 0 single-ended 4 se ad mode input_c (1) input_d (1) 1 0 1 differential 1 pbtl 0 0 ad mode 1 0 bd mode 1 1 0 reserved 1 1 1 (1) input_c and _d are used to select between a subset of ad and bd mode operations in pbtl mode (1 = vreg and 0 = agnd). package heat dissipation ratings (1) parameter tas5615phd tas5615dkd r q jc ( c/w) ? 2 btl or 4 se channels 3.63 2.52 r q jc ( c/w) ? 1 btl or 2 se channel(s) 5.95 3.22 r q jc ( c/w) ? 1 se channel 9.9 6.9 pad area (2) 49 mm 2 80 mm 2 (1) j c is junction-to-case, ch is case-to-heat sink (2) r q h is an important consideration. assume a 2-mil thickness of typical thermal grease between the pad area and the heat sink and both channels active. the r q ch with this condition is 1.22 c/w for the phd package and 1.02 c/w for the dkd package. table 1. ordering information (1) t a package description 0 c ? 70 c tas5615phd 64-pin htqfp 0 c ? 70 c tas5615dkd 44-pin psop3 (1) for the most current package and ordering information, see the package option addendum at the end of this document, or see the ti web site at www.ti.com . copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 3 product folder link(s) : tas5615
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com absolute maximum ratings over operating free-air temperature range unless otherwise noted (1) tas5615 unit vdd to agnd ? 0.3 to 13.2 v gvdd to agnd ? 0.3 to 13.2 v pvdd_x to gnd_x (2) ? 0.3 to 69.0 v out_x to gnd_x (2) ? 0.3 to 69.0 v bst_x to gnd_x (2) ? 0.3 to 82.2 v bst_x to gvdd_x (2) ? 0.3 to 69.0 v vreg to agnd ? 0.3 to 4.2 v gnd_x to gnd ? 0.3 to 0.3 v gnd_x to agnd ? 0.3 to 0.3 v oc_adj, m1, m2, m3, osc_io+, osc_io ? , freq_adj, vi_cm, c_startup, ? 0.3 to 4.2 v psu_ref to agnd input_x ? 0.3 to 5 v reset, sd, otw1, otw2, clip, ready to agnd ? 0.3 to 7.0 v continuous sink current ( sd, otw1, otw2, clip, ready) 9 ma operating junction temperature range, t j 0 to 150 c storage temperature, t stg ? 40 to 150 c human-body model (3) (all pins) 2 kv electrostatic discharge charged-device model (3) (all pins) 500 v (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) these voltages represent the dc voltage + peak ac waveform measured at the terminal of the device in all conditions. (3) failure to follow good anti-static esd handling during manufacture and rework contributes to device malfunction. make sure the operators handling the device are adequately grounded through the use of ground straps or alternative esd protection. recommended operating conditions over operating free-air temperature range (unless otherwise noted) min nom max unit pvdd_x half-bridge supply dc supply voltage 25 50 52.5 v supply for logic regulators and gate-drive gvdd_x dc supply voltage 10.8 12 13.2 v circuitry vdd digital regulator supply voltage dc supply voltage 10.8 12 13.2 v r l (btl) 7 8.0 output filter according to schematics in r l (se) load impedance 3.5 4.0 ? the application information section. r l (pbtl) 3.5 4.0 l output (btl) 14 15 l output (se) output filter inductance minimum output inductance at i oc 14 15 m h l output (pbtl) 14 15 nominal 385 400 415 pwm frame rate selectable for am interference f pwm am1 315 333 350 khz avoidance; 1% resistor tolerance am2 260 300 335 nominal; master mode 9.9 10 10.1 r freq_adj pwm frame-rate programming resistor am1; master mode 19.8 20 20.2 k ? am2; master mode 29.7 30 30.3 voltage on freq_adj pin for slave mode v freq_adj slave mode 3.3 operation t j junction temperature 0 150 c 4 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 pin functions pin function (1) description name phd no. dkd no. agnd 8 10 p analog ground bst_a 54 43 p hs bootstrap supply (bst), external 0.033- m f capacitor to out_a required bst_b 41 34 p hs bootstrap supply (bst), external 0.033- m f capacitor to out_b required bst_c 40 33 p hs bootstrap supply (bst), external 0.033- m f capacitor to out_c required bst_d 27 24 p hs bootstrap supply (bst), external 0.033- m f capacitor to out_d required /clip 18 ? o clipping warning; open drain; active-low c_startup 3 5 o startup ramp requires a charging capacitor of 4.7 nf to agnd. freq_adj 12 14 i pwm frame-rate programming pin requires resistor to agnd. 7, 23, 24, 57, gnd 9 p ground 58 gnd_a 48, 49 38 p power ground for half-bridge a gnd_b 46, 47 37 p power ground for half-bridge b gnd_c 34, 35 30 p power ground for half-bridge c gnd_d 32, 33 29 p power ground for half-bridge d gvdd_a 55 ? p gate-drive voltage supply requires 0.1- m f capacitor to gnd_a. gvdd_b 56 ? p gate-drive voltage supply requires 0.1- m f capacitor to gnd_b. gvdd_c 25 ? p gate-drive voltage supply requires 0.1- m f capacitor to gnd_c. gvdd_d 26 - p gate-drive voltage supply requires 0.1- f capacitor to gnd_d. gvdd_ab ? 44 p gate-drive voltage supply requires 0.22- m f capacitor to gnd_a/gnd_b. gvdd_cd ? 23 p gate-drive voltage supply requires 0.22- m f capacitor to gnd_c/gnd_d. input_a 4 6 i input signal for half bridge a input_b 5 7 i input signal for half bridge b input_c 10 12 i input signal for half bridge c input_d 11 13 i input signal for half bridge d m1 20 20 i mode selection m2 21 21 i mode selection m3 22 22 i mode selection nc 59 ? 62 ? ? no connect; pins may be grounded. oc_adj 1 3 o analog overcurrent-programming pin requires resistor to ground: 64 pin qfp package (phd) = 22 k ? 44 pin psop3 package (dkd) = 24 k ? osc_io+ 13 15 i/o oscillaotor master/slave output/input osc_io ? 14 16 i/o oscillaotor master/slave output/input /otw ? 18 o overtemperature warning signal, open-drain, active-low /otw1 16 ? o overtemperature warning signal, open-drain, active-low /otw2 17 ? o overtemperature warning signal, open-drain, active-low out_a 52, 53 39, 40 o output, half bridge a out_b 44, 45 36 o output, half bridge b out_c 36, 37 31 o output, half bridge c out_d 28, 29 27, 28 o output, half bridge d psu_ref 63 1 p psu reference requires close decoupling of 330 pf to agnd. power supply input for half-bridge a requires close decoupling of 2.2- m f pvdd_a 50, 51 41, 42 p capacitor to gnd_a. power supply input for half-bridge b requires close decoupling of 2.2- m f pvdd_b 42, 43 35 p capacitor to gnd_b. power supply input for half-bridge c requires close decoupling of 2.2- m f pvdd_c 38, 39 32 p capacitor to gnd_c. (1) i = input, o = output, p = power copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 5 product folder link(s) : tas5615
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com pin functions (continued) pin function (1) description name phd no. dkd no. power supply input for half-bridge d requires close decoupling of 2.2- m f pvdd_d 30, 31 25, 26 p capacitor to gnd_d. ready 19 19 o normal operation; open drain; active-high reset 2 4 i device reset input, active-low; requires 47-k ? pullup resistor to vreg sd 15 17 o shutdown signal, open-drain, active-low power supply for internal voltage regulator requires a 10- m f capacitor with a vdd 64 2 p 0.1- m f capacitor to gnd for decoupling. analog comparator reference node requires close decoupling of 1 nf to vi_cm 6 8 o gnd. vreg 9 11 p internal regulator supply filter pin requires 0.1- m f capacitor to gnd. 6 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 typical system block diagram copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 7 product folder link(s) : tas5615 2-channel h-bridge btl mode output h-bridge 2 pvdd_a, b, c, d gnd_a, b, c, d hardwire over- current limit 8 gnd vdd vreg agnd oc_adj pvdd power supply decoupling gvdd, vdd, & vreg power supply decoupling system power supplies pvdd gvdd (12v)/vdd (12v) gnd 50v 12v gnd vac bootstrap caps bst_c bst_d 2 nd order l-c output filter for each h-bridge out_c out_d gvdd_a, b, c, d bootstrap caps bst_a bst_b input_a 2 nd order l-c output filter for each h-bridge out_a out_b 8 4 output h-bridge 1 input h-bridge 1 input_b m2 m1 m3 hardwire mode control input h-bridge 2 input_c input_d vi_cm c_startup psu_ref caps for external filtering & startup/stop input dc blocking caps input dc blocking caps system microcontroller or analog circuitry ready analog_in_a analog_in_b analog_in_c analog_in_d freq_adj hardwire pwm frame rate adjust & master/slave mode osc_io+ osc_io- oscillator synchronization 2 2 2 2 (2) sd reset clip otw1 otw2 otw , ,
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com functional block diagram 8 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615 m1 m2 reset sd otw2 agnd oc_adj vreg vdd gvdd_a m3 gnd input_d out_a gnd_a pvdd_a bst_a gvdd_a pwm activity detector gvdd_c gvdd_b input_c out_b gnd_b pvdd_b bst_b gvdd_b gvdd_d gvdd_c out_c gnd_c pvdd_c bst_c gvdd_d out_d gnd_d pvdd_d bst_d input_b input_a pvdd_x out_x gnd_x timing control control gate-drive timing control control gate-drive timing control control gate-drive timing control control gate-drive pwm receiver analog input mux pwm receiver pwm receiver pwm receiver + - + - + - + - protection & i/o logic vi_cm psu_ff power-up reset temp sense over-load protection ppsc cb3c uvp current sense vreg c_startup analog loop filter analog loop filter analog loop filter analog loop filter oscillator freq_adj osc_sync_io- psu gnd _ref 44 4 osc_sync_io+ otw1 ready clip analog comparator mux startup control pvdd_x
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 audio characteristics (btl) pcb and system configuraton are in accordance with recommended guidelines. audio frequency = 1 khz, pvdd_x = 50 v, gvdd_x = 12 v, r l = 8 ? , f s = 400 khz, r oc = 22 k ? , t c = 75 c, output filter: l dem = 15 m h, c dem = 680 nf, mode = 010, unless otherwise noted. parameter test conditions min typ max unit r l = 8 ? , 10% thd+n, clipped output signal 160 p o power output per channel w r l = 8 ? , 1% thd+n, unclipped output signal 125 thd+n total harmonic distortion + noise 1 w 0.05 % a-weighted, aes17 filter, input capacitor v n output integrated noise 260 m v grounded |v os | output offset voltage inputs ac-coupled to agnd 40 150 mv snr signal-to-noise ratio (1) 100 db dnr dynamic range 100 db p idle power dissipation due to idle losses (i pvdd_x ) p o = 0, 4 channels switching (2) 2.3 w (1) snr is calculated relative to 1% thd+n output level. (2) actual system idle losses also are affected by core losses of output inductors. audio specification (single-ended output) pcb and system configuraton are in accordance with recommended guidelines. audio frequency = 1 khz, pvdd_x = 50 v, gvdd_x = 12 v, r l = 4 ? , f s = 400 khz, r oc = 22 k ? , t c = 75 c, output filter: l dem = 15 m h, c dem = 330 nf, mode = 100, unless otherwise noted. parameter test conditions min typ max unit r l = 4 ? , 10% thd+n, clipped output signal 75 p o power output per channel w r l = 4 ? , 1% thd+n, unclipped output signal 60 thd+n total harmonic distortion + noise 1 w 0.05 % v n output integrated noise a-weighted 350 m v snr signal-to-noise ratio (1) a-weighted 93 db dnr dynamic range a-weighted 93 db p idle power dissipation due to idle losses (i pvdd_x ) p o = 0, 4 channels switching (2) 1.15 w (1) snr is calculated relative to 1% thd+n output level. (2) actual system idle losses are affected by core losses of output inductors. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 9 product folder link(s) : tas5615
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com audio specification (pbtl) pcb and system configuraton are in accordance with recommended guidelines. audio frequency = 1 khz, pvdd_x = 50 v, gvdd_x = 12 v, r l = 4 ? , f s = 400 khz, r oc = 22 k ? , t c = 75 c, output filter: l dem = 15 m h, c dem = 680 nf, mode = 101-bd, unless otherwise noted. parameter test conditions min typ max unit r l = 4 ? , 10% thd+n, clipped output signal 300 r l = 6 ? , 10% thd+n, clipped output signal 210 r l = 8 ? , 10% thd+n, clipped output signal 160 p o power output per channel w r l = 4 ? , 1% thd+n, unclipped output signal 240 r l = 6 ? , 1% thd+n, unclipped output signal 160 r l = 8 ? , 1% thd+n, unclipped output signal 125 thd+n total harmonic distortion + noise 1 w 0.05 % v n output integrated noise a-weighted 260 m v snr signal-to-noise ratio (1) a-weighted 100 db dnr dynamic range a-weighted 100 db p idle power dissipation due to idle losses (ipvdd_x) p o = 0, 4 channels switching (2) 2.3 w (1) snr is calculated relative to 1% thd+n output level. (2) actual system idle losses are affected by core losses of output inductors. electrical characteristics pvdd_x = 50 v, gvdd_x = 12 v, vdd = 12 v, t c (case temperature) = 75 c, f s = 400 khz, unless otherwise specified. parameter test conditions min typ max unit internal voltage regulator and current consumption voltage regulator, only used as reference vreg vdd = 12 v 3 3.3 3.6 v node vi_cm analog comparator reference node 1.5 1.75 1.9 v operating, 50% duty cycle 22.5 ivdd vdd supply current ma idle, reset mode 22.5 50% duty cycle 8 i gvdd_x gate-supply current per half-bridge ma reset mode 1.5 50% duty cycle without output filter or load 7 ma i pvdd_x half-bridge idle current reset mode, no switching 610 m a analog inputs r in input resistance ready = high 33 k ? v in maximum input voltage swing 5 v i in maximum input current 342 ma g voltage gain (v out /v in ) 23 db oscillator nominal, master mode 3.85 4 4.15 f osc_io+ am1, master mode f pwm 10 3.15 3.33 3.5 mhz am2, master mode 2.6 3 3.35 v ih high-level input voltage 1.86 v v il low-level input voltage 1.45 v output-stage mosfets drain-to-source resistance, low side (ls) 120 200 m ? t j = 25 c, includes metallization resistance, r ds(on) gvdd = 12 v drain-to-source resistance, high side (hs) 120 200 m ? 10 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 electrical characteristics (continued) pvdd_x = 50 v, gvdd_x = 12 v, vdd = 12 v, t c (case temperature) = 75 c, f s = 400 khz, unless otherwise specified. parameter test conditions min typ max unit i/o protection undervoltage protection limit, gvdd_x v uvp,g 9.5 v and vdd v uvp,hyst (1) 0.6 v otw1 (1) overtemperature warning 1 95 100 105 c otw2 (1) overtemperature warning 2 115 125 135 c temperature drop needed below otw otw hyst (1) temperture for otw to be inactive after 25 c otw event. ote (1) overtemperature error 145 155 165 c ote- ote-otw differential 30 c otw differential (1) a reset must occur for sd to be released ote hyst (1) 25 c following an ote event olpc overload protection counter f pwm = 400 khz 2.6 ms resistor ? programmable, nominal continious current in 1- ? load, 64 pin qfp 10 a package (phd), r ocp = 22 k ? i oc overcurrent limit protection resistor ? programmable, nominal continious current in 1- ? load, 44 pin 10 a psop3 package (dkd), r ocp = 24 k ? resistor ? programmable, continious current i oc_latched overcurrent limit protection in 1- ? load, 10 a r ocp = 47 k ? time from switching transition to flip-state i oct overcurrent response time 150 ns induced by overcurrent connected when reset is active to provide i pd output pulldown current of each half 3 ma bootstrap charge. not used in se mode. static digital specifications v ih high-level input voltage 1.9 v input_x, m1, m2, m3, reset v il low-level input voltage 1.45 v leakage input leakage current 100 m a otw/shutdown ( sd) internal pullup resistance, otw1 to r int_pu 20 26 32 k ? vreg, otw2 to vreg, sd to vreg internal pullup resistor 3 3.3 3.6 v oh high-level output voltage v external pullup of 4.7 k ? to 5 v 4.5 5 v ol low-level output voltage i o = 4 ma 200 500 mv device fanout otw1, otw2, sd, clip, fanout no external pullup 30 devices ready (1) specified by design. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 11 product folder link(s) : tas5615
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com typical characteristics, btl configuration total harmonic+noise output power vs vs output power supply voltage figure 1. figure 2. unclipped output power system efficiency vs vs supply voltage output power figure 3. figure 4. 12 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615 0 320 40 80 120 160 200 240 280 2 channels output power - w 0 100 10 20 30 40 50 60 70 80 90 efficiency - % t = 75c thd+n at 10% c 8 w 20m 100m 200m 1 2 10 20 100 200 p - output power - w o 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 thd+n - total harmonic distortion + noise - % t = 75c c 8 w 25 27 29 31 33 35 37 39 41 43 45 47 49 pvdd - supply voltage - v 0 180 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 p - output power - w o t = 75c thd+n at 10% c 8 w 0 150 10 20 30 40 50 60 70 80 90 100 110 120 130 140 p - output power - w o 25 27 29 31 33 35 37 39 41 43 45 47 49 pvdd - supply voltage - v t = 75c c 8 w
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 typical characteristics, btl configuration (continued) system power loss output power vs vs output power case temperature figure 5. figure 6. noise amplitude vs frequency figure 7. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 13 product folder link(s) : tas5615 0 320 40 80 120 160 200 240 280 2 channels output power - w 0 34 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 power loss - w t = 75c thd+n at 10% c 8 w -160 0 -140 -120 -100 -80 -60 -40 -20 0 22 2 4 6 8 10 12 14 16 18 20 f - frequency - khz noise amplitude - db t = 75c, v = 32.7 v, sample rate = 48 khz, fft size = 16384 c ref 0 20 40 60 80 100 120 140 160 180 200 10 120 20 30 40 50 60 70 80 90 100 110 t - case temperature - c c p - output power - w o thd+n at 10% 8 w
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com typical characteristics, se configuration total harmonic distortion + noise output power vs vs output power supply voltage figure 8. figure 9. output power vs case temperature figure 10. 14 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615 0 90 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 25 27 29 31 33 35 37 39 41 43 45 47 49 pvdd - supply voltage - v p - output power - w o 4 w 6 w 8 w t = 75c thd+n at 10% c 20m 100 100m 200m 1 2 10 20 p - output power - w o 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 thd+n - total harmonic distortion + noise - % 4 w 6 w 8 w 0 100 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 10 120 20 30 40 50 60 70 80 90 100 110 p - output power - w o t - case temperature - c c 4 w 6 w 8 w thd+n at 10%
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 typical characteristics, pbtl configuration total harmonic distortion + noise output power vs vs output power supply voltage figure 11. figure 12. output power vs case temperature figure 13. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 15 product folder link(s) : tas5615 0 400 40 80 120 160 200 240 280 320 360 p - output power - w o 10 120 20 30 40 50 60 70 80 90 100 110 t - case temperature - c c 4 w 6 w 8 w thd+n at 10% 0.005 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 thd+n - total harmonic distortion + noise - % 20m 100m 200m 1 2 10 20 100 200 p - output power - w o 500 4 w 6 w 8 w t = 75c c 0 340 20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320 25 27 29 31 33 35 37 39 41 43 45 47 49 pvdd - supply voltage - v p - output power - w o 4 w 6 w 8 w t = 75c thd+n at 10% c
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com application information pcb material recommendation fr-4 glass epoxy material with 2 oz. (70 m m) is recommended for use with the tas5615. the use of this material can provide for higher power output, improved thermal performance, and better emi margin, due to lower pcb trace inductance. pvdd capacitor recommendation the large capacitors used in conjunction with each full bridge are referred to as the pvdd capacitors. these capacitors should be selected for proper voltage margin and adequate capacitance to support the power requirements. in practice, with a well-designed system power supply, 1000 m f, 63 v will support more applications. the pvdd capacitors should be low-esr type because they are used in a circuit associated with high-speed switching. decoupling capacitor recommendations in order to design an amplifier that has robust performance, passes regulatory requirements, and exhibits good audio performance, good-quality decoupling capacitors should be used. in practice, x7r should be used in this application. the voltage of the decoupling capacitors should be selected in accordance with good design practices. temperature, ripple current, and voltage overshoot must be considered. this fact is particularly true in the selection of the 2.2 m f that is placed on the power supply to each half-bridge. it must withstand the voltage overshoot of the pwm switching, the heat generated by the amplifier during high power output, and the ripple current created by high power output. a minimum voltage rating of 63 v is required for use with a 50-v power supply. system design recommendations the following schematics and pcb layouts illustrate best practices in the use of the tas5615. 16 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 figure 14. typical differential input btl application with bd modulation filters copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 17 product folder link(s) : tas5615 in_left_n in_left_p r_right_n in_right_p /reset /sd /otw1 /otw2 /clip ready osc_io+ osc_io- gvdd/vdd (+12v) pvdd gvdd/vdd (+12v) pvdd pvdd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd vreg gnd gnd gnd gnd gnd gnd gnd vreg vreg gnd gnd gnd gnd gnd gnd gnd out_left_p out_left_m + - out_right_p out_right_m + - 17 62 63 1819 64 2021 24 23 2225 27 2629 2830 31 32 1 33 34 35 37 23 36 4 38 39 56 7 40 41 89 42 10 43 11 44 45 12 46 47 13 48 1415 49 16 50 51 52 5453 5655 57 58 59 60 61 r11100r r11100r r703.3r r703.3r c22100nf c22100nf l1115uh l1115uh r323.3r r323.3r c701nf c701nf c31100nf c31100nf r30 3.3r r30 3.3r c52 680nf c52 680nf c7710nf c7710nf c78 10nf c78 10nf r733.3r r733.3r r31 3.3r r31 3.3r r74 3.3r r74 3.3r c721nf c721nf c18 100pf c18 100pf u10 tas5615phd u10 tas5615phd oc_adj /reset c_startup input_a input_b vi_cm gnd agnd vreg input_c input_d freq_adj osc_io+ osc_io- /sd /otw1 /otw2 /clip ready m1 m2 m3 gnd gnd gvdd_c gvdd_d bst_d out_d out_d pvdd_d pvdd_d gnd_d gnd_a gnd_b gnd_b out_b out_b pvdd_b pvdd_b bst_b bst_c pvdd_c pvdd_c out_c out_c gnd_c gnd_c gnd_d vdd psu_ref nc nc nc nc gnd gnd gvdd_b gvdd_a bst_a out_a out_a pvdd_a pvdd_a gnd_a l12 15uh l12 15uh c53 680nf c53 680nf c68 47uf63v c68 47uf63v c65 1000uf c65 1000uf r713.3r r713.3r c7510nf c7510nf c632.2uf c632.2uf r1947k r1947k r18100r r18100r c30100nf c30100nf c7410nf c7410nf c4233nf c4233nf r13100r r13100r c50 680nf c50 680nf c711nf c711nf r723.3r r723.3r c20 4.7nf c20 4.7nf c66 1000uf c66 1000uf c14 10uf c14 10uf l1015uh l1015uh c602.2uf c602.2uf c7610nf c7610nf r333.3r r333.3r c4333nf c4333nf c2510uf c2510uf c17 100pf c17 100pf c692.2uf c692.2uf c612.2uf c612.2uf c32 100nf c32 100nf c15 100pf c15 100pf c16 10uf c16 10uf c12 10uf c12 10uf c13 100pf c13 100pf l1315uh l1315uh c21 1nf c21 1nf r12100r r12100r c23 330pf c23 330pf c622.2uf c622.2uf c26100nf c26100nf c731nf c731nf c51 680nf c51 680nf c641000uf c641000uf c10 10uf c10 10uf c671000uf c671000uf c33 100nf c33 100nf r2022.0k r2022.0k c4133nf c4133nf c11 100pf c11 100pf c4033nf c4033nf r21 10k r21 10k r10100r r10100r
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com figure 15. typical differential (2n) pbtl application with bd modulation filters 18 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615 in_n in_p /reset /sd /otw1 /otw2 /clip ready gvdd (+12v) pvdd osc_io+ osc_io- gvdd (+12v) vdd (+12v) pvdd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd vreg gnd gnd gnd gnd gnd vreg gnd gnd gnd gnd gnd gnd vreg vreg gnd gnd gnd gnd gnd gnd 12 3 4 5 6 7 89 1011 12 13 14 15 16 1718 19 20 21 22 23 24 25 26 27 2829 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 + - out_left_p out_left_m 3.3r 3.3r 100nf 100nf 4.7nf 4.7nf 100nf 100nf 100nf 100nf 10uf 10uf 330pf 330pf 1000uf 63v 1000uf 63v 15uh 15uh 3.3r 3.3r 2.2uf100v 2.2uf100v 47k 47k 100nf 100nf 1nf 100v 1nf 100v 3.3r 3.3r 33nf 33nf 3.3r 3.3r 15uh 15uh 1000uf 63v 1000uf 63v 10uf 10uf 10nf100v 10nf100v 3.3r 3.3r 100r 100r 1nf 1nf 100r 100r 1000uf 63v 1000uf 63v 680nf 250v 680nf 250v 680nf 250v 680nf 250v 47uf63v 47uf63v tas5615phd tas5615phd oc_adj /reset c_startup input_a input_b vi_cm gnd agnd vreg input_c input_d freq_adj osc_io+ osc_io- /sd /otw1 /otw2 /clip ready m1 m2 m3 gnd gnd gvdd_c gvdd_d bst_d out_d out_d pvdd_d pvdd_d gnd_d gnd_a gnd_b gnd_b out_b out_b pvdd_b pvdd_b bst_b bst_c pvdd_c pvdd_c out_c out_c gnd_c gnd_c gnd_d vdd psu_ref nc nc nc nc gnd gnd gvdd_b gvdd_a bst_a out_a out_a pvdd_a pvdd_a gnd_a 1nf 100v 1nf 100v 10uf 10uf 100pf 100pf 10nf100v 10nf100v 100nf 100nf 33nf 33nf 15uh 15uh 2.2uf100v 2.2uf100v 100r 100r 3.3r 3.3r 33nf 33nf 3.3r 3.3r 2.2uf100v 2.2uf100v 10nf100v 10nf100v 22.0k 22.0k 100pf 100pf 2.2uf100v 2.2uf100v 10k 10k 33nf 33nf 100nf 100nf 100pf 100pf 2.2uf100v 2.2uf100v 15uh 15uh 1000uf 63v 1000uf 63v
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 figure 16. typical se application copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 19 product folder link(s) : tas5615 in_b in_a in_d in_c /reset /sd /otw1 /otw2 /clip ready pvdd a pvdd b pvdd c pvdd d a b c d gvdd (+12v) pvdd osc_io+ osc_io- gvdd (+12v) vdd (+12v) pvdd pvdd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd vreg gnd vreg gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd vreg gnd 62 17 63 18 64 1920 21 24 23 22 25 27 26 29 2830 31 32 33 34 1 35 37 2 36 3 38 4 39 56 40 41 7 42 89 10 43 44 45 11 46 12 47 13 48 1415 49 16 50 51 52 5453 5655 57 58 59 60 61 out_b_p out_b_m + - + - out_d_p out_d_m + - out_c_p out_c_m + - out_a_p out_a_m pvdd r_comp 50 v 49 v 48 v <48 v 160 kohm 140 kohm180 kohm 187 kohm tas5615phd tas5615phd oc_adj /reset c_startup input_a input_b vi_cm gnd agnd vreg input_c input_d freq_adj osc_io+ osc_io- /sd /otw1 /otw2 /clip ready m1 m2 m3 gnd gnd gvdd_c gvdd_d bst_d out_d out_d pvdd_d pvdd_d gnd_d gnd_a gnd_b gnd_b out_b out_b pvdd_b pvdd_b bst_b bst_c pvdd_c pvdd_c out_cout_c gnd_c gnd_c gnd_d vdd psu_ref nc nc nc nc gnd gnd gvdd_b gvdd_a bst_a out_a out_a pvdd_a pvdd_a gnd_a 3.3r 3.3r 100nf 100nf 2.2uf 2.2uf 2.2uf 2.2uf 15uh 15uh 470uf 50v 470uf 50v 470uf 50v 470uf 50v 470uf 50v 470uf 50v 10nf 100v 10nf 100v 15uh 15uh 33nf 33nf 470uf 50v 470uf 50v 100nf100v 100nf100v 3.3r 3.3r 470uf 50v 470uf 50v 10nf 100v 10nf 100v 3.3r 3.3r 10k 1% 10k 1% 47uf63v 47uf63v 100r 100r 3.3r 3.3r 15uh 15uh 100r 100r 100nf100v 100nf100v 10uf 10uf 100pf 100pf 330nf250v 330nf250v r_comp r_comp 10k 1% 10k 1% 10uf 10uf 100nf100v 100nf100v 10uf 10uf 1nf 100nf 100nf 22.0k 22.0k 3.3r 3.3r 100nf100v 100nf100v 100pf 100pf 470uf 50v 470uf 50v 10uf 10uf 3.3r 3.3r 10uf 10uf 330nf250v 330nf250v 3.3r 3.3r 10k 10k r_comp r_comp 10k 1% 10k 1% 10nf 10nf 3.3r 3.3r 10k 10k 10nf 100v 10nf 100v 10k 1% 10k 1% 10k 1% 10k 1% 100nf 100nf 330 pf 47k 47k r_comp r_comp 10k 10k r_comp r_comp 100nf100v 100nf100v 330nf250v 330nf250v 100pf 100pf 10nf 10nf 100nf100v 100nf100v 100r 100r 100nf 100nf 2.2uf 2.2uf 100r 100r 10k 10k 10k 1% 10k 1% 3.3r 3.3r 15uh 15uh 100pf 100pf 10nf100v 10nf100v 2.2uf 2.2uf 100nf100v 100nf100v 100pf 100pf 10nf100v 10nf100v 10k 1% 10k 1% 470uf 50v 470uf 50v 3.3r 3.3r 470uf 50v 470uf 50v 33nf 33nf 3.3r 3.3r 330nf250v 330nf250v 10k 10k 2.2uf 2.2uf 100nf 100nf 10k 1% 10k 1% 10nf100v 10nf100v 33nf 33nf 100nf 100nf 3.3r 3.3r 33nf 33nf 3.3r 3.3r 10nf 100v 10nf 100v 100r 100r 100nf100v 100nf100v 10nf100v 10nf100v
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com figure 17. typical 2.1 system differential-input btl and unbalanced-input se application 20 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615 in_center_n in_center_p in_right in_left /reset /sd /otw1 /otw2 /clip ready gvdd (+12v) pvdd osc_io+ osc_io- gvdd (+12v) vdd (+12v) pvdd pvdd pvdd pvdd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd vreg gnd vreg gnd gnd gnd gnd gnd gnd gnd vreg gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd 62 17 63 18 64 1920 21 24 23 2225 27 2629 2830 31 32 33 34 1 35 37 2 36 3 38 4 39 56 40 41 7 42 89 10 43 44 45 11 46 12 47 13 48 1415 49 16 50 51 52 5453 5655 57 58 59 60 61 out_center_p out_center_m + - out_left_m out_right_m + - + - out_left_p out_right_p pvdd r_comp 50 v49 v 48 v <48 v 160 kohm 140 kohm180 kohm 187 kohm 100nf 100nf 100nf 100nf 10uf 10uf 10k 10k 100nf 100nf 3.3r 3.3r 10k 1% 10k 1% tas5615phd tas5615phd oc_adj /reset c_startup input_a input_b vi_cm gnd agnd vreg input_c input_d freq_adj osc_io+ osc_io- /sd /otw1 /otw2 /clip ready m1 m2 m3 gnd gnd gvdd_c gvdd_d bst_d out_d out_d pvdd_d pvdd_d gnd_d gnd_a gnd_b gnd_b out_b out_b pvdd_b pvdd_b bst_b bst_c pvdd_c pvdd_c out_c out_c gnd_c gnd_c gnd_d vdd psu_ref nc nc nc nc gnd gnd gvdd_b gvdd_a bst_a out_a out_a pvdd_a pvdd_a gnd_a 100pf 100pf r_comp r_comp 330nf250v 330nf250v 100nf 100nf 10nf100v 10nf100v 470uf 50v 470uf 50v 100nf 100nf 1000uf 63v 1000uf 63v 10uf 10uf 100nf100v 100nf100v 100pf 100pf 100nf100v 100nf100v 330pf 330pf 10nf 100v 10nf 100v 470uf 50v 470uf 50v 10k 1% 10k 1% 1000uf 63v 1000uf 63v 10k 10k 3.3r 3.3r 47uf63v 47uf63v 3.3r 3.3r 10k 1% 10k 1% 2.2uf100v 2.2uf100v 330nf250v 330nf250v 10uf 10uf 15uh 15uh 10nf100v 10nf100v 3.3r 3.3r 680nf 250v 680nf 250v r_comp r_comp 10uf 10uf 33nf 33nf 470uf 50v 470uf 50v 3.3r 3.3r 10nf100v 10nf100v 100r 100r 10nf100v 10nf100v 1nf 100v 1nf 100v 3.3r 3.3r 100r 100r 3.3r 3.3r 47k 47k 2.2uf100v 2.2uf100v 15uh 15uh 33nf 33nf 100nf100v 100nf100v 100nf 100nf 100r 100r 3.3r 3.3r 100nf100v 100nf100v 10uf 10uf 100pf 100pf 3.3r 3.3r 100r 100r 2.2uf100v 2.2uf100v 2.2uf100v 2.2uf100v 100pf 100pf 10nf100v 10nf100v 10k 10k 10nf 100v 10nf 100v 2.2uf100v 2.2uf100v 1nf 100v 1nf 100v 680nf 250v 680nf 250v 33nf 33nf 15uh 15uh 33nf 33nf 100pf 100pf 10nf 10nf 22.0k 22.0k 100r 100r 15uh 15uh 470uf 50v 470uf 50v 3.3r 3.3r 1nf 1nf 3.3r 3.3r 10k 1% 10k 1%
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 theory of operation power supplies to facilitate system design, the tas5615 needs only a 12-v supply in addition to the (typical) 50-v power-stage supply. an internal voltage regulator provides suitable voltage levels for the digital and low-voltage analog circuitry. additionally, all circuitry requiring a floating voltage supply, e.g., the high-side gate drive, is accommodated by built-in bootstrap circuitry requiring only an external capacitor for each half-bridge. in order to provide outstanding electrical and acoustical characteristics, the pwm signal path, including gate drive and output stage, is designed as identical, independent half-bridges. for this reason, each half-bridge has separate gate-drive supply (gvdd_x), bootstrap pins (bst_x), and power-stage supply pins (pvdd_x). furthermore, an additional pin (vdd) is provided as supply for all common circuits. although supplied from the same 12-v source, it is highly recommended to separate gvdd_a, gvdd_b, gvdd_c, gvdd_d, and vdd on the printed-circuit board (pcb) by rc filters (see application diagram for details). these rc filters provide the recommended high-frequency isolation. special attention should be paid to placing all decoupling capacitors as close to their associated pins as possible. in general, inductance between the power supply pins and decoupling capacitors must be avoided. (see reference board documentation for additional information.) for a properly functioning bootstrap circuit, a small ceramic capacitor must be connected from each bootstrap pin (bst_x) to the power-stage output pin (out_x). when the power-stage output is low, the bootstrap capacitor is charged through an internal diode connected between the gate-drive power-supply pin (gvdd_x) and the bootstrap pin. when the power-stage output is high, the bootstrap capacitor potential is shifted above the output potential and thus provides a suitable voltage supply for the high-side gate driver. in an application with pwm switching frequencies in the range from 300 khz to 400 khz, it is recommended to use 33-nf ceramic capacitors, size 0603 or 0805, for the bootstrap supply. these 33-nf capacitors ensure sufficient energy storage, even during minimal pwm duty cycles, to keep the high-side power stage fet (ldmos) fully turned-on during the remaining part of the pwm cycle. special attention should be paid to the power-stage power supply; this includes component selection, pcb placement, and routing. as indicated, each half-bridge has independent power-stage supply pins (pvdd_x). for optimal electrical performance, emi compliance, and system reliability, it is important that each pvdd_x pin is decoupled with a 2.2- m f ceramic capacitor placed as close as possible to each supply pin. it is recommended to follow the pcb layout of the tas5615 reference design. for additional information on recommended power supply and required components, see the application diagrams in this data sheet. the 12-v supply should be from a low-noise, low-output-impedance voltage regulator. likewise, the 50-v power-stage supply is assumed to have low output impedance and low noise. the power-supply sequence is not critical as facilitated by the internal power-on-reset circuit. moreover, the tas5615 is fully protected against erroneous power-stage turnon due to parasitic gate charging. thus, voltage-supply ramp rates (dv/dt) are non-critical within the specified range (see the recommended operating conditions table of this data sheet). system power-up/power-down sequence powering up the tas5615 does not require a power-up sequence. the outputs of the h-bridges remain in a high-impedance state until the gate-drive supply voltage (gvdd_x) and vdd voltage are above the undervoltage protection (uvp) voltage threshold (see the electrical characteristics table of this data sheet). although not specifically required, it is recommended to hold reset in a low state while powering up the device. this allows an internal circuit to charge the external bootstrap capacitors by enabling a weak pulldown of the half-bridge output. powering down the tas5615 does not require a power-down sequence. the device remains fully operational as long as the gate-drive supply (gvdd_x) voltage and vdd voltage are above the undervoltage protection (uvp) voltage threshold (see the electrical characteristics table of this data sheet). although not specifically required, it is a good practice to hold reset low during power down, thus preventing audible artifacts including pops or clicks. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 21 product folder link(s) : tas5615
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com error reporting the sd, otw, otw1 and otw2 pins are active-low, open-drain outputs. their function is for protection-mode signaling to a pwm controller or other system-control device. any fault resulting in device shutdown is signaled by the sd pin going low. likewise, otw and otw2 go low when the device junction temperature exceeds 125 c and otw1 goes low when the junction temperature exceeds 100 c (see the following table). sd otw1 otw2, otw description 0 0 0 overtemperature (ote) or overload (olp) or undervoltage (uvp). junction temperature higher than 125 c (overtemperature warning) 0 0 1 overload (olp) or undervoltage (uvp). junction temperature higher than 100 c (overtemperature warning) 0 1 1 overload (olp) or undervoltage (uvp). junction temperature lower than 100 c 1 0 0 junction temperature higher than 125 c (overtemperature warning) 1 0 1 junction temperature higher than 100 c (overtemperature warning) 1 1 1 junction temperature lower than 100 c and no olp or uvp faults (normal operation) note that asserting either reset low forces the sd signal high, independent of faults being present. ti recommends monitoring the otw signal using the system microcontroller and responding to an overtemperature warning signal by, e.g., turning down the volume to prevent further heating of the device resulting in device shutdown (ote). to reduce external component count, an internal pullup resistor to 3.3 v is provided on both sd and otw outputs. level compliance for 5-v logic can be obtained by adding external pullup resistors to 5 v (see the electrical characteristics section of this data sheet for further specifications). device protection system the tas5615 contains advanced protection circuitry carefully designed to facilitate system integration and ease of use, as well as to safeguard the device from permanent failure due to a wide range of fault conditions such as short circuits, overload, overtemperature, and undervoltage. the tas5615 responds to a fault by immediately setting the power stage in a high-impedance (hi-z) state and asserting the sd pin low. in situations other than overload and overtemperature error (ote), the device automatically recovers when the fault condition has been removed, i.e., the supply voltage has increased. the device functions on errors, as shown in the following table btl mode pbtl mode se mode local turns off local turns off local turns off error in error in error in a a+b a a+b+c+d a a+b b b b c c+d c c c+d d d d bootstrap uvp does not shut down according to the table, it shuts down the respective half-bridge. pin-to-pin short circuit protection (ppsc) the ppsc detection system protects the device from permanent damage in the case that a power output pin (out_x) is shorted to gnd_x or pvdd_x. for comparison, the oc protection system detects an overcurrent after the demodulation filter where ppsc detects shorts directly at the pin before the filter. ppsc detection is performed at start-up, i.e., when vdd is supplied; consequently, a short to either gnd_x or pvdd_x after system start-up does not activate the ppsc detection system. when ppsc detection is activated by a short on the output, all half-bridges are kept in a hi-z state until the short is removed; the device then continues the start-up sequence and starts switching. the detection is controlled globally by a two-step sequence. the first step ensures that there are no shorts from out_x to gnd_x; the second step tests that there are no shorts from out_x to pvdd_x. the total duration of this process is roughly proportional to the capacitance of the 22 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 output lc filter. the typical duration is < 15 ms/ m f. while the ppsc detection is in progress, sd is kept low, and the device does not react to changes applied to the reset pin. if no shorts are present, the ppsc detection passes, and sd is released. a device reset does not start a new ppsc detection. ppsc detection is enabled in btl and pbtl output configurations; the detection is not performed in se mode. to make sure not to trip the ppsc detection system, it is recommended not to insert resistive load to gnd_x or pvdd_x. overtemperature protection the two different package options have individual overtemperature protection schemes. phd package the tas5615 phd package option has a three-level temperature-protection system that asserts an active-low warning signal ( otw1) when the device junction temperature exceeds 100 c (typical), ( otw2) when the device junction temperature exceeds 125 c (typical) and, if the device junction temperature exceeds 155 c (typical), the device is put into thermal shutdown, resulting in all half-bridge outputs being set in the high-impedance (hi-z) state and sd being asserted low. ote is latched in this case. to clear the ote latch, reset must be asserted. thereafter, the device resumes normal operation. dkd package the tas5615 dkd package option has a two-level temperature-protection system that asserts an active-low warning signal ( otw) when the device junction temperature exceeds 125 c (typical) and, if the device junction temperature exceeds 155 c (typical), the device is put into thermal shutdown, resulting in all half-bridge outputs being set in the high-impedance (hi-z) state and sd being asserted low. ote is latched in this case. to clear the ote latch, reset must be asserted. thereafter, the device resumes normal operation. undervoltage protection (uvp) and power-on reset (por) the uvp and por circuits of the tas5615 fully protect the device in any power-up/down and brownout situation. while powering up, the por circuit resets the overload circuit (olp) and ensures that all circuits are fully operational when the gvdd_x and vdd supply voltages reach levels stated in the electrical characteristics table. although gvdd_x and vdd are independently monitored, a supply-voltage drop below the uvp threshold on any vdd or gvdd_x pin results in all half-bridge outputs immediately being set in the high-impedance (hi-z) state and sd being asserted low. the device automatically resumes operation when all supply voltages have increased above the uvp threshold. device reset when reset is asserted low, all power-stage fets in the four half-bridges are forced into a high-impedance (hi-z) state. in btl modes, to accommodate bootstrap charging prior to switching start, asserting the reset input low enables weak pulldown of the half-bridge outputs. in the se mode, the output is forced into a high-impedance state when asserting the reset input low. asserting the reset input low removes any fault information to be signalled on the sd output, i.e., sd is forced high. a rising-edge transition on reset input allows the device to resume operation after an overload fault. to ensure thermal reliability, the rising edge of reset must occur no sooner than 4 ms after the falling edge of sd. system design consideration a rising-edge transition on the reset input allows the device to execute the start-up sequence and starts switching. apply only audio when the state of ready is high; that starts and stops the amplifier without having audible artifacts in the output transducers. if an overcurrent protection event is introduced, the ready signal goes low; hence, filtering is needed if the signal is intended for audio muting in non-microcontroller systems. the clip signal indicates that the output is approaching clipping. the signal can be used to decrease either an audio volume or an intelligent power supply controlling a low and a high rail. the device inverts the audio signal from input to output. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 23 product folder link(s) : tas5615
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com the vreg pin is not recommended to be used as a voltage source for external circuitry. oscillator the oscillator frequency can be trimmed by external control of the freq_adj pin. to reduce interference problems while using a radio receiver tuned within the am band, the switching frequency can be changed from nominal to lower values. these values should be chosen such that the nominal and the lower-value switching frequencies together result in the fewest cases of interference throughout the am band. switching frequencies can be selected by the value of the freq_adj resistor connected to agnd in master mode. for slave-mode operation, turn of the oscillator by pulling the freq_adj pin to vreg. this configures the osc_i/o pins as inputs and must be slaved from an external clock. printed circuit board recommendation use an unbroken ground plane to have a good low-impedance and -inductance return path to the power supply for power and audio signals. pcb layout, audio performance and emi are linked closely together. the circuit contains high, fast-switching currents; therefore, care must be taken to prevent damaging voltage spikes. routing of the audio input should be kept short and together with the accompanied audio source ground. it is important to keep a solid local ground area underneath the device to minimize ground bounce. netlist for this printed circuit board is generated from the schematic in figure 14 . 24 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615
tas5615 www.ti.com slas595b ? june 2009 ? revised february 2010 note t1 : pvdd decoupling bulk capacitors c60 ? c64 should be as close as possible to the pvdd and gnd_x pins; the heat sink sets the distance. wide traces should be routed on the top layer with direct connection to the pins and without going through vias. no vias or traces should be blocking the current path. note t2 : close decoupling of pvdd with low-impedance x7r ceramic capacitors is placed under the heat sink and close to the pins. note t3 : heat sink must have a good connection to pcb ground. note t4 : output filter capacitors, preferably metal film types, must be linear in the applied voltage range. figure 18. printed circuit board ? top layer copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 25 product folder link(s) : tas5615
tas5615 slas595b ? june 2009 ? revised february 2010 www.ti.com note b1 : it is important to have a direct low-impedance return path for high current back to the power supply. keep impedance low from top to bottom side of pcb through a lot of ground vias. note b2 : bootstrap low-impedance x7r ceramic capacitors placed on bottom side providing a short low-inductance current loop. note b3 : return currents from bulk capacitors and output filter capacitors. figure 19. printed circuit board ? bottom layer revision history changes from original (june 2009) to revision a page ? deleted product preview from the phd package ................................................................................................................. 3 changes from revision a (september 2009) to revision b page ? changed pin location diagram .............................................................................................................................................. 2 ? replaced chip graphic in pinout diagram ............................................................................................................................. 2 ? changed several frame-rate specifications in the recommended operating condition s .................................................... 4 ? changed specifications for oscillator frequencies in the electrical characteristics ............................................................ 10 ? changed response time for overload protection counter in electrical characteristics ....................................................... 11 ? revised component values on pins 6 and 63 in typical se application illustration ........................................................... 19 26 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s) : tas5615
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) tas5615dkd active hssop dkd 44 29 green (rohs & no sb/br) cu nipdau level-4-260c-72 hr TAS5615DKDR active hssop dkd 44 500 green (rohs & no sb/br) cu nipdau level-4-260c-72 hr tas5615phd active htqfp phd 64 90 green (rohs & no sb/br) cu nipdau level-5a-260c-24 hr tas5615phdr active htqfp phd 64 1000 green (rohs & no sb/br) cu nipdau level-5a-260c-24 hr (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 31-mar-2010 addendum-page 1
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant TAS5615DKDR hssop dkd 44 500 330.0 24.4 14.7 16.4 4.0 20.0 24.0 q1 tas5615phdr htqfp phd 64 1000 330.0 24.4 17.0 17.0 1.5 20.0 24.0 q2 package materials information www.ti.com 18-jan-2010 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) TAS5615DKDR hssop dkd 44 500 346.0 346.0 41.0 tas5615phdr htqfp phd 64 1000 346.0 346.0 41.0 package materials information www.ti.com 18-jan-2010 pack materials-page 2

important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of ti information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. ti products are not authorized for use in safety-critical applications (such as life support) where a failure of the ti product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of ti products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by ti. further, buyers must fully indemnify ti and its representatives against any damages arising out of the use of ti products in such safety-critical applications. ti products are neither designed nor intended for use in military/aerospace applications or environments unless the ti products are specifically designated by ti as military-grade or "enhanced plastic." only products designated by ti as military-grade meet military specifications. buyers acknowledge and agree that any such use of ti products which ti has not designated as military-grade is solely at the buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. ti products are neither designed nor intended for use in automotive applications or environments unless the specific ti products are designated by ti as compliant with iso/ts 16949 requirements. buyers acknowledge and agree that, if they use any non-designated products in automotive applications, ti will not be responsible for any failure to meet such requirements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dlp? products www.dlp.com communications and www.ti.com/communications telecom dsp dsp.ti.com computers and www.ti.com/computers peripherals clocks and timers www.ti.com/clocks consumer electronics www.ti.com/consumer-apps interface interface.ti.com energy www.ti.com/energy logic logic.ti.com industrial www.ti.com/industrial power mgmt power.ti.com medical www.ti.com/medical microcontrollers microcontroller.ti.com security www.ti.com/security rfid www.ti-rfid.com space, avionics & www.ti.com/space-avionics-defense defense rf/if and zigbee? solutions www.ti.com/lprf video and imaging www.ti.com/video wireless www.ti.com/wireless-apps mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2010, texas instruments incorporated

▲Up To Search▲

Price & Availability of TAS5615DKDR

	To Download TAS5615DKDR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .